2025 IEEE T-CPMT Best Paper Award
Our work on co-designed silicon photonics chip I/O received a 2025 IEEE T-CPMT Best Paper Award.
We are honored to share that our paper, “Co-Designed Silicon Photonics Chip I/O for Energy-Efficient Petascale Connectivity”, has been selected for a 2025 Best Paper Award from the IEEE Transactions on Components, Packaging and Manufacturing Technology (T-CPMT).
The work presents a co-designed silicon photonics chip I/O architecture for energy-efficient petascale connectivity. It combines scalable dense wavelength-division multiplexing, co-packaged photonic devices, and end-to-end transmission validation to provide a path toward high-bandwidth, sub-pJ/bit optical connectivity for future computing systems.
See the official IEEE Electronics Packaging Society award announcement.
Congratulations and many thanks to all our collaborators: Songli Wang, Robert Parsons, Swarnava Sanyal, Vignesh Gopal, Asher Novick, Anthony Rizzo, Michal Lipson, Alexander L. Gaeta, and Keren Bergman!
