Invited Paper at IEEE CICC 2024
Our invited paper on embedded silicon photonics I/O is accepted at IEEE CICC 2024 and will be presented on April 22, 2024.
Read the full paper to be presented at the 2024 IEEE Custom Integrated Circuits Conference (CICC) here.
In this paper, we present the design and characterization of a silicon photonics (SiPh) transceiver chip aimed at ultra-high bandwidth and energy-efficient die-to-die connectivity. This chip employs a dense wavelength-division multiplexing (DWDM) approach in the multi-free spectral range (FSR) regime, targeting a bandwidth density of over 2 Tbps/mm with energy consumption below 1 pJ/bit. We review the link architecture and photonic integrated circuit (PIC) design, detailing key components such as even-odd (de-)interleavers, vertical-junction microdisk modulators, and add-drop filter arrays. The paper also discusses the implications of process variations and wafer-scale substrate undercuts on energy efficiency, ultimately proposing a scalable solution for future high-performance computing and data center networks.
