Invited Journal Paper in IEEE T-CPMT
Our invited journal paper on comb-driven 3D-integrated photonics I/O is accepted for publication in IEEE T-CPMT.
Read the full paper in IEEE Transactions on Components, Packaging and Manufacturing Technology (T-CPMT) here.
In this paper, we explore a co-designed silicon photonics chip input/output (I/O) architecture tailored for achieving energy-efficient, petascale connectivity in hyper-scale computing environments. As the data demands driven by large-scale artificial intelligence (AI) models and machine learning applications continue to surge, existing interconnect technologies face significant limitations in bandwidth and energy efficiency. The proposed solution leverages dense wavelength-division multiplexing (DWDM) and incorporates advanced components such as microresonator-based modulators and filters, optimized for low energy consumption and compact integration.
The architecture is designed around a Kerr frequency comb source, enabling massive parallelism with scalable bandwidth capacities. Key innovations include the use of even-odd (de-)interleavers and custom vertical-junction microdisk modulators for efficient signal modulation and routing. Packaging advancements such as 3D integration with electronic drivers are also highlighted, enhancing the bandwidth density to achieve over 2 Tbps/mm and 17 Tbps/mm² with a sub-pJ/bit energy profile.
Our findings include successful device-level validations and an end-to-end transmission demonstration that confirm the system’s potential for high-performance optical I/O. This work outlines a clear path toward integrating silicon photonics with computing systems to address future connectivity challenges at petascale levels.
